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softcore-processor-design

Here are 6 public repositories matching this topic...

WassimHedfi / FPGA-Projects

This repository showcases the projects I developed for the DE10-Lite board as part of the "FPGA Capstone: Building FPGA Projects" course on Coursera.

c fpga vhdl verilog modelsim quartus-prime de10-lite fpga-design programmable-logic-design softcore-processor-design

Updated Sep 26, 2024
Verilog

AEjonanonymous / Gardner-Logic-Bridge

Rescuing Moore’s Law via Room-Temperature Soliton Integration in Standard Silicon.

fpga information-theory javascript-engine systemverilog hardware-designs logic-gates constraint-based-modeling topological-materials inverse-scattering computational-methods moores-law soliton-dynamics independent-time softcore-processor-design room-temperature-superconductors post-cmos soliton-physics threshold-optimization iso-velocity-computation

Updated Apr 22, 2026
SystemVerilog

mujahedeenkompakhaitianmonetaryunit765 / Gardner-Logic-Bridge

Build a Gardner Logic-Bridge IP core for threshold-programmable, room-temperature soliton logic in standard silicon

fpga information-theory javascript-engine systemverilog hardware-designs logic-gates constraint-based-modeling topological-materials inverse-scattering computational-methods moores-law soliton-dynamics independent-time softcore-processor-design room-temperature-superconductors post-cmos soliton-physics threshold-optimization iso-velocity-computation

Updated Sep 29, 2026
SystemVerilog

mit41301 / PandaBuilder

PandaBuilder by Logic Solutions Bründler

cpu vhdl systemverilog panda softcore verilo softcore-processor-design

Updated Sep 12, 2026
VHDL

0xArt / Biscuit

The lightweight RISCV core.

embedded fpga riscv verilog verilog-hdl riscv32 softcore softcore-processor-design

Updated Jul 15, 2026
SystemVerilog

LoPalma / tec30

A formally verified, C programmable, custom ISA 160LUT softcore.

c compiler formal-verification softcore softcore-processor-design

Updated Sep 27, 2026
Assembly

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