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FYI, I stumbled upon this while working on xtensor-stack/xsimd#1417. |
…idth When a packed value starts on a byte boundary its high part contributes nothing, but LargeKernelPlan::Build still asks for a left shift, and on 8 bit lanes that shift is the whole lane width. Some backends saturate and give zero, others use the low bits of the shift amount and return the lane unchanged, so its bits survive the mask. Point the high swizzle back at the low byte instead and set the shift to zero. The emitted kernel is unchanged and arrow-bpacking-benchmark shows no difference.
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Rationale for this change
When a packed value starts on a byte boundary its high part contributes nothing, but LargeKernelPlan::Build still asks for a left shift, and on 8 bit lanes that shift is the whole lane width. Some backends saturate and give zero, others use the low bits of the shift amount and return the lane unchanged, so its bits survive the mask.
So affected values decode incorrectly with no error reported, that can lead to silent data corruption.
What changes are included in this PR?
Point the high swizzle back at the low byte instead and set the shift to zero. So the plan never asks for the shift at all.
This is a compile-time change to the kernel plan. The emitted kernel is unchanged.
Are these changes tested?
Yes
I also added a new assert that fails to compile on main.
Are there any user-facing changes?
No
Was AI used for this PR?
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