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simd: 16-byte strided care-masked matcher (ternary_match_strided16_to_mask) - #340
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…_mask) Full-width sibling of ternary_match_strided_to_mask: all 128 bits of a 16-byte strided register participate, (reg[k]^pattern[k])&care[k]==0 for k<16. Same execution model (scalar gathers, U64x8 XOR_AND ternlog, now on two u64 halves, scalar tail); no population-sized scratch. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_017PWtMb9jQ4gof5g4y2jzNt
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Navigate logical layers of code changes, visualize relationships, and explore their blast radius. 🧰 Additional context used📚 Code guidelines (1)📝 WalkthroughWalkthroughAdds Changes16-byte strided matcher
Priority: ⬇️ Low Estimated code review effort: 3 (Moderate) | ~20 minutes Change: Feature Suggested reviewers: Merge Risk: 🔵 Low · up to The new matcher appears functionally sound, but its public API shape departs from the project's SIMD contract. Align the API with that contract, or explicitly accept the deviation, before merging. 🚥 Pre-merge checks | ✅ 5✅ Passed checks (5 passed)
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Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_017PWtMb9jQ4gof5g4y2jzNt
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Review comments at @src/simd_masking_ops.rs:
- Line 3787: Convert ternary_match_strided16_to_mask from a public free function
into a method on the relevant typed wrapper, and shape its batch primitive to
accept a closure parameter, preserving the existing matching behavior.
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What
ndarray::simd::ternary_match_strided16_to_maskis the full-width sibling ofternary_match_strided_to_mask.(bytes, first_offset, stride_bytes, count, pattern: &[u8; 16], care: &[u8; 16], out_words)imatches iff(reg[k] ^ pattern[k]) & care[k] == 0for everyk < 16. All 128 bits participate. The existing kernel covers only 12 bytes, the V3 facet payload.from_le_bytesgathers, with no alignment requirement;U64x8ternlogXOR_AND, now on twou64halves;Why
lance-graph's mask-risc can match a 12-byte facet payload in place (
Pred::MatchFacetStrided). A care-masked match over a whole 16-byte register currently requires extracting hi/lou64columns first, which materialises them. This kernel removes that need. The lance-graph exposure follows in a dependent PR.Tests
ternary_match_strided16_equals_bytewise_referencecompares against a byte-wise scalar reference.ternary_match_strided16_sees_bytes_past_twelve: a row that differs only in byte 15 misses under full care. The 12-byte matcher calls the same row a hit. With byte 15 set to don't-care, the row matches again.ternary_match_strided16_rejects_a_last_element_past_the_buffer: an element that would read past the end of the buffer panics.Disable runs, each red then green:
cargo clippy --lib --tests -D warningsis clean. Locally I ran only the default dispatch; the other backends are covered bysimd-matrix.yaml.🤖 Generated with Claude Code
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