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simd: bounded u8 power sums into 128-bit registers, lossless widen, tiled driver (D-LXC-29) - #339
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…den, tiled driver (D-LXC-29) Register layout [n, sum, sum_sq, reserved] as four LE u32 words; the bivariate fold uses two rails, rail0 = the univariate register of x and rail1 = [sum_y, sum_y_sq, sum_xy, reserved], so n is stored once. Tile bound 2^16 rows, compile-checked to fit u32 at u8::MAX; a larger tile is refused before any write. widen_* gives the exact PowerSums / CrossPowerSums, and fold_*_tiles merges tiles with checked_merge, refusing a tile whole if any group's merge overflows. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01X1YcYMRSFvfczXoP748wtB
Asserts exactness, then times the u8 register folds against the wide i32 kernels per tile size and over a 16-tile population, and prints the realized SIMD tier. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01X1YcYMRSFvfczXoP748wtB
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Navigate logical layers of code changes, visualize relationships, and explore their blast radius. 🧰 Additional context used📚 Code guidelines (1)📝 WalkthroughWalkthroughThe change adds bounded ChangesBounded Power-Sum Folding
Priority: ➖ Normal Estimated code review effort: 4 (Complex) | ~45 minutes Change: Feature Sequence Diagram(s)sequenceDiagram
participant Caller
participant TiledFold
participant TileCallback
participant Output
Caller->>TiledFold: fold rows by bounded tiles
TiledFold->>TileCallback: process tile range
TileCallback-->>TiledFold: bounded registers or error
TiledFold->>TiledFold: check all group merges
TiledFold->>Output: merge widened tile results
TiledFold-->>Caller: return result or error
Suggested reviewers: Merge Risk: 🔵 Low · up to Document the bounded-fold exception before merging so the public APIs have a clear contract. The identified gap does not establish incorrect fold results. 🚥 Pre-merge checks | ✅ 5✅ Passed checks (5 passed)
✨ Finishing Touches📝 Generate docstrings
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Review comments at @src/simd_masking_ops.rs:
- Around line 2497-2513: Add a scoped bounded-fold exception to the
masking-layer contract documentation: identify the public bounded-fold,
widening, and tile-merging helpers in simd_masking_ops.rs as slice-level
accumulator and orchestration APIs, exempt them from per-ISA backend bodies and
cross-ISA parity harnesses, and note that keyed folds use scalar group_walk for
data-dependent scatter-reduction. State that scalar tests compare bounded
results with existing wide folds.
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Cargo.tomlexamples/bounded_power_sums_bench.rssrc/simd.rssrc/simd_masking_ops.rs
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What
Six new folds for
u8lanes that write into 128-bit registers instead of wide accumulators. This is the first consumer of lance-graph'sRegister128slab reading (D-LXC-29).Univariate:
masked_group_bounded_power_sums_u8{,_via,_pair}u32words:[n, Σx, Σx², reserved].Bivariate:
masked_group_bounded_cross_power_sums_u8{,_via,_pair}[n, Σx, Σx², ·], the same register the univariate fold produces for x;[Σy, Σy², Σxy, ·].nis stored once.Tile bound:
BOUNDED_TILE_ROWS = 65,536.255² · 2^16 < 2^32, so no word can wrap within a tile.BoundedFoldError::TileTooLargebefore anything is written.Widening:
widen_bounded_{,cross_}power_sumsturns registers into the exactPowerSums/CrossPowerSums.Tiled drivers:
fold_bounded_{,cross_}power_sums_tileschecked_merge.All six folds go through the existing
group_walk. Lane, via and pair addressing and the drop rules are therefore exactly those of thei32kernels. No existing API changed.Tests (8 new; each disable below was run and turned the named tests red)
u8::MAXfit exactly, univariate and bivariatethe_full_bound_at_u8_max_fits_exactlyone_row_past_the_bound_is_refused_before_any_writethe_reserved_word_is_never_writteni32kernel for lane, via and pairnarrow_then_widen_…,bivariate_narrow_then_widen_…checked_mergeequal the whole populationpartitioned_tiles_merge_to_the_wholean_overflowing_merge_commits_nothing_of_the_tilea_refused_tile_aborts_the_tiled_foldChecks run:
clippy --lib --example bounded_power_sums_bench -D warningsis clean andfmt --checkpasses.Measured
examples/bounded_power_sums_bench, run on an AVX-512 host (avx512f=true), release build, 16 groups, median of 31 runs, ns/row. Each case asserts exactness before it is timed.How to read these numbers:
i32, so the conversion cost that the bounded path avoids is not counted.The companion lance-graph PR (contract carrier + jc end-to-end test) needs this one merged first.
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